1. Field of the Invention
The present invention relates to a signal processing device provided with plural signal processing function blocks and a central processing block for monitoring or controlling the state of said signal processing function blocks.
2. Related Background Art
The conventional signal processing device, in which a central processing block monitors and controls the state of plural function blocks for individual signal processing, is composed, as shown in FIG. 1, of a central processing unit 10 and n function blocks 12-14 mutually connected by an address bus 16, a control bus 18 and a data bus 20, in which the control signals and sensed signals of said function blocks 12-14 are transmitted through said buses.
FIG. 2 is a block diagram of an input/output circuit, to be connected to said buses 16, 18, 20, of the function blocks 12-14 in the conventional structure shown in FIG. 1. When an address decoder 22 identifies, based on an address signal on the address bus 16 and a control signal on the control bus 18, the presence of a control signal for this block on the data bus 20, said address decoder 22 fetches said digital control signal from the data bus 20 through a bidirectional buffer 24, and activates a D/A converter 26 by a control signal 22A. In this manner there is obtained an analog control signal to be used when a control circuit 27 of each function block functions in response to an analog input. Numeral 28 indicates an analog amplifier. An analog sensed signal from an analog sensor circuit 29 is amplified by an analog amplifier 30, then digitized by an A/D converter 32 and is sent to the data bus 20 through the bidirectional buffer 24.
FIG. 3 is a block diagram showing another conventional structure, wherein a central processing unit 34 and n function blocks 36-38 are connected by an address bus 40, a control bus 42 and a data bus 44 as in FIG. 2. In the present example the function blocks 36-38 are respectively provided with analog control lines 46-1-46-n and analog sense lines 48-1 - 48-n, which are respectively selected by switches 50, 52. When the central processing unit 34 wants to send a control signal to a particular function block #k, the switch 50 is connected to the analog control line 46-k of said function block, and a digital control signal is sent to a D/A converter 54, which converts said signal into an analog signal. Said analog control line 46-k is sent through the switch 50 and the analog control line 46-k, to the function block #k. Also when the central processing unit 34 wants to receive a sensed signal from a function block #k, the switch 52 is connected to the analog sense line 48-k, whereby an analog sense signal from said block #k is supplied to an A/D converter 56 and the digitized signal is entered into the central processing unit 34.
However the conventional structure shown in FIGS. 1 and 2 requires an A/D converter and a D/A converter for each function block, thus leading to an increased magnitude of circuit and an elevated cost of manufacture.
Also the conventional structure shown in FIG. 3 requires only an A/D converter and a D/A converter in total, but requires an analog control line and an analog sense line for each function block, thus involving complication of wirings. This drawback may not be evident when a limited number of function blocks are involved, but becomes conspicuous when a large number of function blocks have to be connected.